A nonvolatile random access memory cell is disclosed in U.S. patent application Ser. No. 200,758 now U.S. Pat. No. 4,348,745 entitled "Nonvolatile Random Access Memory Having Non-Inverted Storage" filed Oct. 27, 1980 by Lawrence S. Schmitz and assigned to the assignee of the present application, the disclosure of the Schmitz application being incorporated herein in its entirety by reference. The Schmitz application describes a nonvolatile random access memory (NOVRAM) including a metal oxide semiconductor transistor having a floating gate.
The charge stored on the floating gate determines the threshold voltage of the transistor, and may be changed by causing charge to tunnel through a thin spot in the insulation underlying the floating gate. Creation of a sufficient electrical potential across the thin spot is accomplished by capacitively coupling the floating gate to another electrode connected to a voltage source. This type of transistor is referred to in this specification as a variable threshold voltage metal oxide semiconductor (VTVMOS) transistor. It is analogous to the usual type of MOS field effect transistor except that the gate stores charge in a virtually permanent manner. The signal controlling the tunneling of charge to the floating gate may be independent of the signal represented by the source to drain current flow through the VTVMOS transistor.
The invention of the Schmitz application was an improvement over the prior art embodied in U.S. Pat. No. 4,126,773 filed Nov. 7, 1977 by Bruce Lee Troutman and Lawrence S. Schmitz, the improvement being that writing and reading of nonvolatile data did not cause logic inversion. The disclosure of the Troutman and Schmitz patent is also incorporated herein by reference.
One problem in such prior art NOVRAM cells is that the presence of the VTVMOS transistors may undesirably upset the operation of the NOVRAM cell. Specifically, in an n-channel device, if one of the VTVMOS transistors is turned "on" very hard (that is to say, its floating gate is so depleted of electrons that it acquires a positive charge), that FATMOS transistor cannot be turned off by applying voltages in the usual control range (0 volts to 5 volts). Therefore, a leakage current continually flows through that VTVMOS transistor, causing power to be absorbed, a significant disadvantage. On the other hand, if one of the VTVMOS transistors is turned "off" very hard (that is to say, its floating gate is charged with an excessive number of electrons) the NOVRAM cell is rendered unstable and can change state during a read operation.
The pair of VTVMOS transistors in the NOVRAM cell of the Schmitz application permits nonvolatile writing and reading of data in the memory cell. However, during normal operation of the memory cell, in which data is written and read in a volatile manner, the nonvolatile state of the two VTVMOS transistors must be ignored by the cell. The disadvantage of the prior art NOVRAM cells exemplified by the above-referenced Troutman patent and Schmitz application is that the VTVMOS transistors create an inherent imbalance in the memory cell which affects its operation during normal (or volatile) reading and writing, giving rise to the problems of leakage current and instability mentioned previously. One solution to this problem in the prior art was to connect a pair of bypass transistors in parallel with the pair of VTVMOS transistors in the NOVRAM cell. However, this prior art solution did not completely isolate the NOVRAM cell from the presence of the VTVMOS transistors during normal volatile reading and writing operations.